The present invention relates to a key assigner system for an electronic musical instrument which comprises a key assigner for writing operating states of keys in a memory and a processor for reading out the operating states to produce tones.
The number of signal sources of a musical tone generator is less than a number of keys in an electronic musical instrument. When approximately the same number of keys as the number of channels are closed, "an assigner" for arranging and designating tone sources for generating tones is required. Necessary processing time (or processing speed) of the processor tends to becomes greater when plural keys are closed, causing delays. Therefore, it would be desirable to develop a system for processing the operating states earlier developed.
FIG. 9 is a block diagram showing an arrangement of an electronic musical instrument. The electronic musical instrument includes key switches 1 for keys, a key assigner 2, a musical tone signal generator 3, an envelope generator 4, an envelope memory 5, a signal amplifier 6 and a speaker 7. The key assigner 2 has a microprocessor 20, an assignment memory 21, a closed-keys sequence memory 22 and a released keys sequence memory 23. Closed-key operation information in the key switch 1 is scanned from the key assigner 2 to detect a closed-key position and a touching speed. The closed-key information is ordinarily stored in a memory contained in the key assigner 2. The envelope generator 4 generates an envelope signal according to information read out from the memory, and applies the envelope signal to the musical tone signal generator 3. A closed-key operation signal is partly applied from the key assigner 2 directly to the musical tone signal generator 3 which, in turn, generates a predetermined musical tone, which is modulated by an envelope signal from the envelope generator 4. The speaker 7 audibly reproduces the musical tones.
The following three types of processing systems of the key assigner 2 heretofore have been realized.
(1) "Previously-closed-key priority assigner"
This is a system for assigning storage areas of a memory in the sequence of detected closed keys to store the closed keys on a time base. This system has a simple processing.
(2) "Higher-tone priority assigner"
Of a system called "middle-tone-omission assigner", this is a system for assigning an S channel from a lower tone side of a closed-key code and a T channel from a higher tone side of a closed-key code on an axis on which tones are aligned in a sequence of pitches of the tones (S+T=N). In this system, the tones are not processed on a time base, but a player does not still feel an inconvenience. Everytime a new closed-key is detected, this system requires reassignment of all N channels.
(3) "Later-closed-key priority assigner"
This is a system for preferentially assigning a later-closed key on a time base when closed keys are sequentially detected on the time base. A method of determining channels to be assigned is complicated. For example, this system assigns the later-closed key for a channel which is keyed OFF at the earliest time of all the key OFF channels when there are the key OFF channels in the assigned channels. If all the channels are key ON channels, the system assigns the later-closed key for a channel which is keyed ON at the earliest time of all the key ON channels. A player does not feel an inconvenience at the most in this system. To execute this system, as shown in FIG. 9, the system needs an assignment memory 21, a closed-keys sequence memory 22 and a released-keys sequence memory 23. The microprocessor 20 of this system processes information in the memories. More specifically, if information is not assigned for all the memories, the released-keys sequence memory 23 is referred to unfilled channels, and the information is assigned for a channel which is the earliest one to be OFF. If all the channels are being used, the closed-keys sequence memory 22 is referred, and the information is rewritten in the channel which is the earliest one to be keyed OFF at the earliest.
In the arrangement of the system shown in FIG. 9, three sets of memories are required, and the microprocessor requires a large quantity of time to process the information in the memories. Thus, this system has such disadvantages that an expensive, high speed processor is required.